The invention relates to a filter device comprising switched-capacitance integrating networks, in which a first group of switched-capacitance integrating networks is used for simulating an analog high-pass ladder filter. The analog filter includes a first and a second input terminal, a first and a secound output terminal, a plurality of series, connected capacitors . . . , C.sub.2k-1, C.sub.2k+1, C.sub.2k+3, . . . (in which the index k is an integer) interconnecting the first input terminal and the first output terminal, a plurality of admittances . . . Y.sub.2k, Y.sub.2k+2, . . . connected between the common electrodes of respective capacitors and the other ends connected to the second input and output terminals via a common line. Each admittance includes an inductor in series with a capacitor.
An important property of ladder filters comprising self-induction coils and loss-free capacitors is that a deviation of the values of these elements from their optimum values gives rise to only a slight degradation of filter characteristics. However, analog filters are expensive to realize, especially because of the presence of the self-induction coils. For realizing such filters it is also possible to employ switched-capacitance integrating networks. The article entitled "Design Techniques for MOS switched Capacitors Ladder Filters," by GORDON M. JACOBS et al, which has appeared in the magazine IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, Vol. cas-25 no. 12, December 1978, describes filters comprising switched-capacitance integrating networks for simulating an analog ladder filter, but said article only describes how to simulate low-pass filters.